Jeff Kuehn, UCF Chairman (Los Alamos National Laboratory)
Jeffery A. (Jeff) Kuehn currently serves as the Program Manager for HPC Strategic Partnerships at Los Alamos National Laboratory. His responsibilities include leading classified and unclassified research portfolios in high performance computing futures with both government and industrial partners including the U.S. Department of Energy’s Exascale Computing Project where he serves on the Hardware Technology Focus Team and as a Principal Investigator for the Design Space Evaluation Team. Previously, Jeff served as the R&D Group Leader for LANL’s High Performance Computing Systems Integration Group where he managed deployments of next generation HPC systems and led a broad research portfolio extending the current state of the art in HPC platforms, networking, and storage. Prior to joining LANL, Jeff held positions including: Principal Engineer and Consultant with Quantum Research International for a classified U.S. Department of Defense program; Senior Research Scientist, Deputy Group Leader, and Co-Founder of the Extreme Scale Systems Center at Oak Ridge National Laboratory where his responsibilities included the OpenSHMEM and UCCS projects and the origination of several software tools and metrics for the performance analysis and diagnosis of extreme scale systems; Senior Software Engineer and Group Leader at National Center for Atmospheric Research where he was credited with driving the early adoption of Linux for HPC and desktop; and Software Analyst/Instructor at Cray Research, Inc. where he is credited with developing a programming language independent approach to designing software for high performance platforms. Jeff holds a B.S. and M.S. in Mechanical Engineering from the University of Colorado, and is a member of both ACM and IEEE.
Gilad Shainer, UCF President (Mellanox Technologies)
Gilad Shainer has served as Mellanox’s vice president of marketing since March 2013. Previously, Mr. Shainer was Mellanox’s vice president of marketing development from March 2012 to March 2013. Mr. Shainer joined Mellanox in 2001 as a design engineer and later served in senior marketing management roles between July 2005 and February 2012. Mr. Shainer holds several patents in the field of high-speed networking and contributed to the PCI-SIG PCI-X and PCIe specifications. Gilad Shainer holds a MSc degree (2001, Cum Laude) and a BSc degree (1998, Cum Laude) in Electrical Engineering from the Technion Institute of Technology in Israel.
Pavel Shamis, UCF treasurer (ARM)
Pavel is a Principal Research Engineer at ARM with over 16 years of experience in development HPC solutions. His work is focused on co-design software and hardware building blocks for high-performance interconnect technologies, development communication middleware, and novel programming models. Prior to joining ARM, he spent five years at Oak Ridge National Laboratory (ORNL) as a research scientist at Computer Science and Math Division (CSMD). In this role, Pavel was responsible for research and development multiple projects in high-performance communication domain including Collective Communication Offload (CORE-Direct & Cheetah), OpenSHMEM, and OpenUCX. Before joining ORNL, Pavel spent ten years at Mellanox Technologies, where he led Mellanox HPC team and was responsible for development HPC software stack, including OFA, OpenMPI, MVAPICH, OpenSHMEM, and other.
Pavel is a recipient of prestigious R&D100 award for his contribution to the development of the CORE-Direct collective-offload technology and he has contributed to multiple open specifications (OpenSHMEM, MPI, OpenUCX) and numerous open source projects (MVAPICH, OpenMPI, OpenSHMEM-UH, etc).
Brad Benton, Board Member (AMD)
Brad Benton is a Principal Member of Technical Staff at AMD. Brad has over twenty-five years of experience in software development and performance analysis. His experience includes high performance computing, heterogeneous architectures, RDMA interconnects and associated clustering technologies, operating system design, and fault-tolerant computing. Brad was a member of the team responsible for the first Linpack petaflop run on the Roadrunner supercomputer.
Duncan Poole, Board Member (Nvidia)
Duncan Poole is responsible for strategic partnerships for NVIDIA’s Accelerated Computing Division. His responsibilities reach across the developer tool chain. To drive successful partnerships where engineering interfaces are adopted by external parties building tools for accelerated computing. This includes open standards, compilers, profilers, debuggers, performance analysis tools, compute and communications libraries. He is responsible for NVIDIA’s partnerships for MPI and their adoption of GPU Direct RDMA, especially in partnership with Mellanox. Duncan is also the president of OpenACC, and responsible for NVIDIA’s membership in OpenMP. These organizations encourage adoption of directives by developers wanting good performance and good portability in their accelerated code.
Pavan Balaji, Board Member (Argonne National Laboratory)
Dr. Pavan Balaji holds appointments as a Computer Scientist and Group Lead at the Argonne National Laboratory, as an Institute Fellow of the Northwestern-Argonne Institute of Science and Engineering at Northwestern University, and as a Research Fellow of the Computation Institute at the University of Chicago. He leads the Programming Models and Runtime Systems group at Argonne. His research interests include parallel programming models and runtime systems for communication and I/O on extreme-scale supercomputing systems, modern system architecture, cloud computing systems, data-intensive computing, and big-data sciences. He has nearly 150 publications in these areas and has delivered nearly 150 talks and tutorials at various conferences and research institutes. Dr. Balaji is a recipient of several awards including the U.S. Department of Energy Early Career award in 2012, TEDxMidwest Emerging Leader award in 2013, Crain’s Chicago 40 under 40 award in 2012, Los Alamos National Laboratory Director’s Technical Achievement award in 2005, Ohio State University Outstanding Researcher award in 2005, six best paper awards, one best paper finalist, and one best poster finalist. He has served as a chair or editor for nearly 50 journals, conferences and workshops, and as a technical program committee member in numerous conferences and workshops. He is a senior member of the IEEE and a professional member of the ACM.
Sameh Sharkawi, Board Member (IBM)
Sameh Sharkawi has been the IBM Parallel Environment Middleware Team Lead since September 2014. Dr. Sharkawi is currently involved in the CORAL project, working on the PAMI and MPI libraries at IBM. Dr. Sharkawi joined IBM in 2007 to work on Multicore systems performance projections and parallel applications performance projections on IBM future systems which ended up as his dissertation work. Dr. Sharkawi later joined the MPI Middleware team focusing on Parallel IO, Collective Communication and Low level API. Dr. Sharkawi holds a PhD and a MSc degrees in Computer Science and Engineering from Texas A&M University (2011, 2006) and a BSc degree in Computer Science from the American University in Cairo.
Dhabaleswar K. (DK) Panda, Board Member (Ohio State University)
Dr. Dhabaleswar K. (DK) Panda is a Professor and Distinguished Scholar of Computer Science at the Ohio State University. He obtained his Ph.D. in computer engineering from the University of Southern California. His research interests include parallel computer architecture, high performance networking, InfiniBand, network-based computing, exascale computing, programming models, GPUs and accelerators, high performance file systems and storage, virtualization and cloud computing and BigData (Hadoop (HDFS, MapReduce and HBase) and Memcached). He has published over 400 papers in major journals and international conferences related to these research areas. Dr. Panda has served (or serving) as Program Chair/Co-Chair/Vice Chair of many international conferences and workshops including CCGrid ’18, ExaComm (15-17), ESPM2 (15-16), HPBDC (15-17), CCGrid ’16, PGAS ’15, HPBDC ’15, HiPC ’12, CCGrid ’12, HiPC ’11, IEEE Cluster (Cluster)’10, Supercomputing (SC)’08, ANCS ’07, Hot Interconnect 2007, IPDPS ’07, HiPC ’07, Hot Interconnect 2006, CAC (2001-04), ICPP ’01, CANPC (1997-98) and ICPP ’98. He has served as the General Chair of ICPP ’06. He has served as an Associate Editor of IEEE Transactions on Parallel and Distributed Systems (TPDS), IEEE Transactions on Computers (TC), and Journal of Parallel and Distributed Computing (JPDC). He has served as Program Committee Member for more than 100 international conferences and workshops. Prof. Panda is a motivated speaker. He has Served as an IEEE Distinguished Visitor and an IEEE Chapters Tutorial Speaker. He has delivered a large number of invited Keynote/Plenary Talks, Tutorials and Presentations Worldwide.
Steve Poole, Board Member (Open Source Software Solutions)